Senior Software Engineer, ML Compilers, Edge TPU
Indexed description
- Health, dental, vision, life, disability insurance
- Retirement Benefits: 401(k) with company match
- Paid Time Off: 20 days of vacation per year, accruing at a rate of 6.15 hours per pay period for the first five years of employment
- Sick Time: 40 hours/year (increased to 69 hours/year for Seattle) including 5 discretionary sick days per instance
- Maternity Leave (Short-Term Disability + Baby Bonding): 28-30 weeks
- Baby Bonding Leave: 18 weeks
- Holidays: 13 paid days per year
- Bachelor’s degree or equivalent practical experience.
- 5 years of experience with software development in one or more programming languages (e.g. C++).
- 3 years of experience testing, maintaining, or launching software products, and 1 year of experience with software design and architecture.
- 3 years of experience with compilers (optimization, parallelization, etc.).
- Master's degree or PhD in Computer Science or related technical field.
- Compiler development experience in the context of accelerator-based architectures.
- Experience working with low-level software or strong interest in developing low-level software.
- Experience working with hardware such as CPU, GPU, or TPU.
- Experience in optimizing ML model inference on device.
As a Senior Software Engineer on the EdgeTPU Compiler team, you will play a key role in building next-generation compiler optimizations to power machine learning (ML) models on custom hardware. In this technical role, you will bridge the gap between ML models and hardware execution, translating framework-level code (JAX, PyTorch) into highly efficient instructions for the EdgeTPU.
You will own end-to-end features, from triaging complex performance and correctness issues to implementing robust, production-ready compiler optimizations. Additionally, you will collaborate cross-functionally with model owners to guide model design, work alongside stakeholders to shape the technical goal, and manage project deliverables to accelerate the deployment of ML experiences on edge devices.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
The US base salary range for this full-time position is $174,000-$252,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google .
Responsibilities
- Design and build ML compiler optimizations for EdgeTPU hardware, and extend leading authoring frameworks (such as JAX and PyTorch) to enable seamless, high-performance compilation.
- Triage, root-cause, and resolve complex correctness and performance issues encountered when deploying state-of-the-art ML models on EdgeTPU.
- Propose, design, and implement robust compiler features and fixes to systematically address performance bottlenecks and hardware limitations.
- Partner closely with ML model owners to influence model architectures, ensuring they are designed for optimal, efficient execution on EdgeTPU systems.
- Own project execution from end to end, collaborating with cross-functional partners and stakeholders, and managing priorities/deadlines/deliverables for key compiler feature areas.
Create a free Caio profile to unlock more results and save your role and location preferences.
Unlock free search