ASIC Physical Design Engineer - Synthesis and Timing - (Associate or Experienced)

Boeing ASIC Physical Design Engineer - Synthesis and Timing - (Associate or Experienced) Reposted YesterdaySaved In-Office El Segundo, CA, USA 99K-162K Annually Junior 99K-162K Annually JuniorAerospace • Information Technology • Software • Cybersecurity • Design • Defense • ManufacturingDesign and implement ASICs for mission-critical aerospace and space applications. Responsibilities include synthesis, static timing analysis, timing constraint management, floorplanning, power and timing convergence, equivalence checking, ECOs, chip integration, signoff, tapeout, and automation. The role collaborates with RTL, verification, DFT, architecture, and external backend teams while troubleshooting cross-domain timing issues and improving physical design methodologies.Top Skills: AsicClock Tree SynthesisCpfDftEcoEda ToolsFloorplanningLogic SynthesisPerlPhysical DesignPhysical VerificationPlace And RoutePythonSocStatic Timing AnalysisTclUpf