I/O Design Engineer
Indexed description
Responsibilities
- Design of CMOS I/O, high-precision bandgap references, op-amps, comparators and power-on-reset circuits.
- Run simulations to validate AC/DC performance, signal integrity, jitter and power.
- Perform transistor reliability and EMIR analysis.
- Work closely with layout teams to oversee physical design and verification.
- Build Verilog, Synopsys Liberty and IBIS models.
- Create and maintain detailed technical documentation, including datasheets, application notes and integration guides.
- Support chip-level integration and silicon bring-up in test chips and customer products.
- MS or PhD in Electrical Engineering.
- 6+ years of I/O or analog circuit design experience.
- Deep proficiency in Cadence Virtuoso Schematic/Layout capture and SPICE/Spectre circuit simulation.
- Solid foundation in I/O protocols including GPIO, I2C, I3C, eMMC, RGMII and SPMI.
- Familiarity with ESD, Latch-up, EMI and Signal Integrity.
- Experience with advanced CMOS FinFET and GAA process nodes, including features, technology limitations and PPA tradeoffs.
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
R026781
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