Sr Principal Design Engineer

Qorvo (Nasdaq: QRVO) supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems-level expertise and global manufacturing scale to quickly solve our customers' most complex technical challenges. Qorvo serves multiple high-growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace/defense. Visit www.qorvo.com to learn how our innovative team is helping connect, protect and power our planet.

Responsibilities

• Responsible for the design of highly-integrated microwave and millimeter-wave RFICs in

various state-of-the-art technologies including CMOS, SiGe BiCMOS or GaAs

• Write proposals for new products including technical aspects and estimates of time to

complete

• Participate in customer meetings and technical interchange meetings
• Contribute to all aspects of RFIC product development including system-level

specifications, floorplanning, characterization, and productization

• Lead a team of engineers and layout designers to design complex RFICs
• Assist with transistor-level layout and modeling for RF design
• RF board and module design
• Select and simulate optimal packaging for specific applications

Lead characterization and productization efforts for IC designs

• Mentor other engineers in circuit design techniques
• Drive process improvement that impacts the engineering function

Requirements

• Proficiency in RFIC and mmW design techniques including EM analysis and individual

sub-circuits

• Proficiency in circuit design including power amplifiers, LNAs, filters, biasing, mixers,

VCOs, PLLs, phase shifters, attenuators, temperature compensation, multipliers,

dividers, switches, detectors, and biasing techniques.

• Works with others to invent new circuit design and simulation techniques.
• Proficiency in understanding noise and isolation effects on overall IC performance
• Sufficient knowledge to predict packaging effects on circuit design and perform EM

analysis on packages.

• Capable to mentor others in advanced circuit design and simulation techniques.
• Knowledgeable about foundry processes and ability to perform trade-studies to select

appropriate processes for specific RFIC applications.

• Proficiency in design tools and analysis methods and interpreting simulation results.
• Finds errors in simulations and can troubleshoot cause of errors.
• Participates in defining design process improvements and implementation of such

improvements.

• Proficiency in IC test and calibration methods and implementation.
• Proficiency in stabilization techniques and stability analyses.

Proficiency in performing peer reviews on other’s circuits and layouts.

• MSEE with 12 years overall experience or Ph.D. with minimum of 10 years overall

Experience

Competitive base salary commensurate with experience: $168,000 - $218,300 (subject to change dependent on physical location)

Posted salary ranges are made in good faith. Qorvo reserves the right to adjust ranges depending on the experience/qualification of the selected candidate as well as external competitiveness and internal comparability.

Base compensation is one element of Total Rewards offered at Qorvo. More information on the Total Rewards package can be shared upon request.

MAKE A DIFFERENCE AT QORVO

We are Qorvo. We do more than create innovative RF and Power solutions for the mobile, defense and infrastructure markets – we are a place to innovate and shape the future of wireless communications. It starts with our employees. As a unified global team, we bring a commitment to excellence, growth and a passion for creating what's next. Explore the possibilities with us.

We are an Equal Employment Opportunity (EEO) employer and welcome all qualified applicants. Applicants will receive fair and impartial consideration without regard to any characteristics protected by applicable law, including race, color, religion, sex (as defined by law), national origin, age, military or veteran status, genetic information, or disability.