ASIC Design Engineer

Job title: ASIC Design Engineer

Level: Senior/Staff/Principle

Location: Ho Chi Minh City & Da Nang City, Vietnam

Responsibilities

• Develop and maintain RTL for digital IP blocks, subsystem design, and SoC-level integration
• Write micro-architecture specifications and collaborate with DV, DFT, and physical design teams throughout the design cycle
• Perform lint, CDC, RDC, SDC & UPF checks
• Drive timing closure and low-power implementation
• Support simulation, emulation, or post-silicon bring-up
• Participate in design reviews and produce clear technical documentation

Requirements

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
• Experience with Verilog/SystemVerilog and standard EDA toolflows
• Solid understanding of digital design fundamentals, timing, and low-power design techniques
• Familiarity with at least one of the following domains:
• SoC or chiplet system architecture
• Bus protocols (AXI/AHB/APB/CHI) and cache/coherency architectures
• CPU (ARM, RISC-V), GPU or NPU architectures
• High-speed IO (PCIe/UCIe/Ethernet/USB/etc.) and memory (DDR/HBM) design
• Multimedia IP (ISP/MIPI/Display/Video/etc)
• Good communication skills; comfortable working across distributed global teams