Senior ASIC Design Engineer, Analog and Power, remote OK

Bleeding Edge Ohio Based Technology Firm, Newly Created Role, Tremendous Growth Opportunity: You will serve as the solo ASIC Design Engineer owning architecture, transistor‐level design, simulation, verification, and delivery of custom ASICs focused on power/voltage conversion, battery‐powered systems, and pure analog circuitry. This role also requires meaningful experience with solid‐state fabrication, semiconductor process flows, and device‐level considerations that directly influence analog/power IC performance.

Core Responsibilities

• Analog & Power ASIC Design: Own full transistor-level lifecycle (architecture to tape-out) with required expertise in pure analog design. Design power conversion circuits—including buck/boost converters, charge pumps, battery management ICs, low/high-voltage stages, and switching/linear regulators.
• IP Development: Develop analog/power IP blocks (biasing networks, references, amplifiers, drivers, protection circuits). Run SPICE, corner, Monte Carlo, aging, and reliability simulations.
• Layout & Fab Interaction: Drive floorplanning, parasitic extraction, matching, and PDK usage. Integrate device physics, doping profiles, oxide variations, high-voltage structures, thermal behavior, and isolation (trench, SOI, guard rings). Evaluate process variation impacts on analog stability and noise.
• Project Ownership: Act as the sole ASIC engineer leading technical strategy, cross-functional integration (PCB, packaging, test), and documentation.

Required Experience & Skills

• Education & Experience: BS/MS in EE, CE, or Physics; 8+ years in transistor-level ASIC/Analog IC design as a sole project lead.
• Pure Analog Expertise: deep experience in pure analog design—transistor-level design, compensation, stability, noise, and biasing—alongside power-conversion and battery-powered architectures.
• Tools: Hands-on proficiency with Cadence (Virtuoso, Spectre, ADE).
• Semiconductor Physics & Fab: Deep understanding of CMOS/BiCMOS flows, device physics, high-voltage structures, fabrication constraints (implantation, oxidation, lithography), and reliability (BTI, HCI, TDDB).

Preferred Qualifications

• Silicon debug, bench validation, and lab bring-up experience.
• Background in wearables, IoT, battery-powered embedded systems, or wide-bandgap devices (GaN, SiC).
• Familiarity with mixed-signal verification methodologies.
• BS or MS Degree in Electrical Engineering, Computer Engineering, Physics or a related area.

Very Competitive Compensation and Benefits, Call or Apply Today!

Note: we can consider on-site (relocation assistance is offered), hybrid or remote employees who can travel to HQ as needed.