Sr. Systems Validation Engineer (SerDes / Physical Layer)
Indexed description
Our Sat Connect IC business unit, a division of our Satellite Systems business, is a leading provider of ASICs, software, multibeam electronically steered antennas, and complete systems for communication satellites, as well as ground and airborne terminals. With locations in Israel, the UK, and the US, we are a technology leader in satellite communication.
Role: Reporting to the Chip Validation Team Leader, the candidate will have the following responsibilities:
- Validate high-speed SerDes PHY.
- Execute test plans for:
- Link bring-up
- Equalization tuning
- Verify functionality across:
- PVT (Process, Voltage, Temperature)
- Different data rates and bandwidths
- Work hands-on with lab equipment:
- Oscilloscopes (real-time / sampling)
- BERT (Bit Error Rate Tester)
- DCA
- PNAX
- Perform:
- Eye diagram measurements
- Jitter tolerance testing
- Tune PHY parameters
- Enable debug hooks (register access, logging)
- Able to test a Stressed eye
- Validation of MDA Chipsets verifying functional and performance metrics
- Development and ownership of chip and system test plan with collaboration of development and test teams
- Development of test automation in Python for the chip and system test plans
- Investigation of root cause of test case failures and providing corrective action in conjunction with the development teams
- Execution, development and planning of Chip & System tests and Contribute to the evolution of product quality for MDA ESMA silicon products
- Support Test Management tools and continuous integration methodologies
- Data analysis and post processing of data collected
- Batchelor/Master Degree in Electronic/Computer Science Engineering
- Ideally, 8-13 years of post-graduation of working expereince
- Experience of testing Telecommunication or Satellite Systems
- Experience of Chip and system testing, especially with Analog, RF and high speed communication blocks
- Knowledge in time domain high speed links (SerDes) and associated equipment (BERT, DCA)
- Proven experience in program language in an automation test environment (C/C++/Python etc.)
- Very good debugging skills. Ability to investigate and root cause the issues observed
- Experience in planning, estimating and development of system tests
- Defect Tracking and Knowledge Management software (Atlassian JIRA and Confluence preferred)
- Knowledge of testing Methodologies
- Knowledge of operation of RF test equipment such as Spectrum Analysers, VNAs/PNA’s, Sig. Gens, power meters , high speed sampling scopes, etc.
- Excellent Interpersonal skills
- Knowledge on RF fundamentals and communications theory
- Independent, self-motivated, team player and multitasking capabilities
- Ability to work in a fast-paced and changing environment
We have entered a new era of exploration and development, and MDA Space welcomes all who yearn to suit up and be part of it. An equal opportunity employer prizing diversity, integrity and collaboration, we are committed to growing MDA Space’s leadership in this next golden age.
Comments/Special Considerations
We are required to conduct a BPSS (Baseline Personnel Security Standard) screening in which we will check your:
- Right to work: To confirm that you are entitled to take up the position as well as check your nationality and immigration status
- Identity: Full ID check
- Criminal records: Basic Disclosure
- Employment history check: Confirmation of past three years of employment (minimum) history/activity
- Reference checks
Equal Opportunity Statement
MDA Space is an equal opportunity employer prizing diversity and inclusion. We are committed to treating all employees and applicants for employment with respect and dignity. If you require assistance and/or reasonable accommodation due to a disability during the application or the recruiting process, please feel free to notify us.
Accommodations
MDA Space is proud to provide accommodation(s) during the recruitment process. Should you require any accommodations, please indicate this on your application/cover letter and we will work with you to meet your accessibility needs.
#IND
Create a free Caio profile to unlock more results and save your role and location preferences.
Unlock free search