Principal Kernel Engineer

Principal Kernel Engineer

European Tech Recruit are working closely with a leading telecommunications R&D company, based in Cambridge, who are looking for a talented Principal Kernel Engineer to join their team.

In this role you will drive deep kernel performance and power optimization for flagship mobile platforms. You will own performance across core kernel subsystems — memory management, scheduling, IPC, and synchronization — analysing behaviour on real silicon down to the microarchitectural level and landing production-shippable optimizations that improve responsiveness, throughput, and battery life.

This is a hands-on role for an engineer who is at home in allocator internals, scheduler hot paths, and lock-contention traces, working alongside CPU microarchitects, runtime engineers, and AI-driven optimization tooling.

Responsibilities as Principal Kernel Engineer:

• Optimize memory management internals: buddy allocator, slab/SLUB, page reclaim and LRU/MGLRU, memory compaction and defragmentation, transparent huge pages, page-fault and TLB-shootdown paths, copy-on-write behaviour.
• Drive scheduler performance: run-queue and load-balancing behaviour, energy-aware scheduling, wakeup latency, task placement on heterogeneous (big.LITTLE/DynamIQ) topologies, cpufreq/cpuidle governor interaction.
• Optimize synchronization primitives and lock-heavy paths: futex fast/slow paths, mutexes and rwsems, spinlocks/qspinlocks, RCU, seqlocks, per-CPU data, memory ordering and barriers on ARM64.
• Analyse and improve IPC and syscall paths: context-switch cost, binder-style IPC, shared memory, vDSO, interrupt/softirq handling.
• Identify bottlenecks on flagship mobile workloads: (gaming, day-of-use, camera, AI inference) using PMU counters, ftrace/perf, eBPF, lockdep/lockstat, and power measurement with mA/mAh attribution.
• Land production-quality kernel patches from hypothesis through benchmarking to ship, with measured latency and energy impact.
• Collaborate with CPU microarchitects on HW-SW co-design: exploit microarchitectural features in the kernel and shape future hardware through kernel-driven requirements.
• Contribute to AI-assisted kernel optimization pipelines.

Requirements:

• 10+ years of OS kernel development in C (Linux or comparable), with patches shipped to production systems at scale.
• Expert-level understanding of MM internals: physical/virtual memory management, buddy and slab allocation, reclaim, compaction, page tables, TLB management.
• Deep scheduler knowledge: CFS/EEVDF internals, load balancing, preemption, real-time classes, energy-aware scheduling.
• Mastery of kernel synchronization: locking primitives, RCU, lock-free techniques, the ARM64 memory model and barrier semantics.
• Proven kernel performance-analysis skills: PMU counters, ftrace/perf, eBPF, lock contention and latency analysis.
• Strong ARM64 architecture grounding: exception levels, cache hierarchy and maintenance, TLBs, memory ordering.

Desirable Experience:

• Mobile power engineering: DVFS governors, cpuidle, per-workload energy attribution.
• Upstream Linux kernel contributions (mm, sched, locking, or related subsystems).
• Familiarity with HarmonyOS or Android common kernel.
• Exposure to CPU microarchitecture and cycle-accurate modelling (gem5).
• Experience with LLM/agentic tooling applied to systems software.

If this role is of any interest please apply directly on LinkedIn or send a copy of your CV to [email protected].

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