Software Developer (FPGA/Systems)

Location: Remote

About The Opportunity

Drive the future of execution performance by engineering the critical software layer connecting custom hardware acceleration units to an ultra-low-latency trading infrastructure. This high-impact role empowers a self-directed developer to own performance-critical solutions—from device drivers to diagnostic frameworks—where microsecond optimizations directly drive business success. You will work alongside top-tier technical peers in an agile, ownership-driven engineering culture.

Responsibilities

• Architect and maintain high-speed C++ interfaces that integrate hardware acceleration components with internal core execution platforms.
• Write and refine custom Linux device drivers, focusing on DMA operations, PCIe protocols, memory mapping, and interrupt management to achieve minimal latency.
• Collaborate closely with hardware designers during lab bring-up, unit validation, and testing of hardware description language modules using automated software frameworks.
• Engineer custom diagnostic utilities, deployment tools, and automation suites using systems-level C++ and Python.
• Analyze overall system performance using host logs, network packet captures, and internal telemetry to isolate bottlenecks and optimize throughput.
• Fine-tune low-latency network communication stacks (TCP/UDP/IP) and custom Ethernet protocols tailored for high-frequency execution environments.

Requirements (must-have)

• 5+ years of hands-on software development experience with a focus on systems programming and low-level performance tuning.
• Advanced proficiency in C++ (C++14/17 standards) alongside strong Python scripting capabilities for tooling and automation.
• Deep knowledge of Linux kernel architecture, including driver creation, interrupt handling, kernel-bypass mechanisms, and memory management.
• Strong technical background in PCIe communication protocols, DMA engines, and hardware-software interface design.
• Mastery of network protocol mechanics (TCP/IP, UDP, Ethernet) and the OSI model within high-throughput systems.
• Practical understanding of hardware-level optimization concepts such as NUMA topology, cache coherency, and memory-mapped I/O.
• Familiarity with hardware description languages (SystemVerilog/Verilog) and the ability to interpret RTL code.
• Experience using network capture tools (e.g., Wireshark) and hardware-level debugging utilities.
• Exposure to vendor FPGA development toolchains (such as Xilinx or Intel suites).
• Excellent verbal and written communication skills with a collaborative, ownership-oriented mindset.

Preferred Qualifications (nice-to-have)

• Prior experience within a proprietary trading, market-making, or high-frequency trading firm.

Compensation & Benefits

• Highly competitive base salary with performance-linked annual bonus potential.
• Comprehensive health, vision, and dental coverage.
• 401(k) retirement plan with employer matching.
• Generous paid time off and wellness perks.
• Equal Opportunity Employer (EEO).

Accepting Candidates