Back to search
TSMC Linkedin · Posted 18d ago

CAD Engineer

Japan

Linkedin
Continue to application Add your email once, then Caio opens the original posting.

Indexed description

Job Description

Software implementation, testing and deployment of digital design flow based on requirements from each design stage (flow framework, design database, library management, circuit construction, physical and electrical sign-off, etc.) domain experts to support advanced large-scale SoC or 3DIC testchip projects.

■Qualification

  • Can do hands-on work is a must.
  • Fluent English communication is a must.
  • MS or Ph.D in electrical engineering or computer science related fields preferred.
  • Familiar with TCL / Python / C++ programming, with good understanding of runtime complexity analysis and data structures preferred.
  • Experience with Cadence’s Innvous / Tempus / Voltus, Synopsys’s Fusion Compiler / PrimeTime / IC-Validator, ANSYS’s Redhawk, Mentor Graphic’s Calibre is a plus.
  • Advanced process (16nm and below) project tapeout experience is a plus."

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, or disability.
Free. 20 seconds. No password. See every match in this search.

Create a free Caio profile to unlock more results and save your role and location preferences.

Unlock free search
Want help applying to roles like this? Search Caio for free. If repetitive applications get heavy, Managed Job Search adds supervised execution for $99/month.
View Managed Job Search