Diagnostics Engineer

Key Responsibilities

• Design, develop, and maintain diagnostic firmware/utilities for wireline switch platforms (e.g., Tomahawk 5 / Teralynx-class systems), including ONIE-launched DIAG environments.
• Develop hardware test coverage across: switch ASIC, CPU, DDR, SPI/eMMC/SSD, PCIe, USB, I2C/PMBus devices, CPLD/FPGA, fan/thermal/power subsystems, optical modules (SFP/QSFP/OSFP and CPO), and front-panel ports.
• Implement port-level diagnostic tests — link bring-up, PRBS, BER, eye margin, loopback (MAC/PCS/PMA), traffic generation, and signal integrity validation.
• Develop and execute manufacturing test flows (ATE / FATP / system-level test) and work with operations to integrate DIAG into factory provisioning.
• Support hardware bring-up: be the first responder on board-level issues, isolate failures across silicon / board / firmware boundaries.
• Build automation around DIAG — scripting, log parsing, pass/fail criteria, and reporting infrastructure.
• Collaborate with BMC, BIOS, and SONiC teams on shared hardware abstraction, sensor access, and recovery paths.
• Participate in root-cause analysis of field returns and customer-reported hardware issues.

Required Qualifications

• Hands-on experience developing hardware diagnostics, BIST, or low-level validation tools on server, switch, or embedded platforms.
• Strong C/C++ programming with solid debugging skills (gdb, JTAG, logic analyzer, scope).
• Solid understanding of Linux user-space and kernel-space development; comfortable working in ONIE / busybox / minimal Linux environments.
• Working knowledge of low-level hardware interfaces: I2C, PMBus, SPI, UART, JTAG, GPIO, MDIO, PCIe.
• Familiarity with switch hardware concepts: switch ASIC architecture, SerDes, MAC/PCS/PHY layers, optical module management (CMIS / SFF-8636), and front-panel port subsystems.
• Ability to read schematics, board layouts, and component datasheets; comfortable working with hardware engineers in the lab.
• Experience supporting at least one full hardware product cycle (EVT → DVT → PVT → MP).
• Bachelor's or Master's degree in Electronics, Electrical Engineering, Computer Engineering, or a related field.

Preferred Qualifications

• Experience with Broadcom Tomahawk or Marvell Teralynx SDKs (BCM SDK / SAI / MRVL SDK) for diagnostic-level access.
• Experience with CPO (co-packaged optics) bring-up and testing.
• Familiarity with ONIE, DC-SCM, OCP switch designs, or whitebox/SONiC ecosystems.
• Experience writing factory test programs and working with CM/EMS partners.
• Scripting in Python / Shell for automation and log analysis.
• Experience with signal integrity testing tools (BERT, scope, VNA) and interpreting eye/jitter measurements.
• Familiarity with thermal and power validation.
• Strong documentation skills — test specs, DIAG user guides, failure analysis reports.

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