Integrated Circuit Design Verification Engineer

Snap Inc. Integrated Circuit Design Verification Engineer Reposted 16 Hours AgoSaved Remote or Hybrid Washington, DC, USA 147K-259K Annually Expert/Leader 147K-259K Annually Expert/LeaderArtificial Intelligence • Cloud • Machine Learning • Mobile • Software • Virtual Reality • App developmentDevelop and execute UVM/SystemVerilog-based verification for AR display integrated circuits. Build assertion-based testbenches, create and run verification plans with functional and code coverage, use Siemens Questa for simulation and debug, and automate verification flows while collaborating with digital, analog, software, and verification teams.Top Skills: AmbaAsicAssertion-Based TestbenchesCode CoverageEmbedded MicrocontrollerEmulationFunctional CoverageI2CLinuxMakeMipiPerlPythonRtlShellSiemens QuestaSpiSystemverilogTclUvmVerilog