Principal Design Engineer

Micron Technology Principal Design Engineer 8 Hours AgoSaved In-Office San Jose, CA, USA 176K-298K Annually Expert/Leader 176K-298K Annually Expert/LeaderArtificial Intelligence • Hardware • Information Technology • Machine LearningLead development and optimization of high-speed IO/datapath circuits for next-generation NAND flash. Drive architecture decisions, manage layout and parasitic extraction, coordinate silicon bring-up and yield improvements, align specifications with customers, and mentor engineers while presenting results to expert panels.Top Skills: Ai For Ic DesignBsim ModelingClock DistributionCmosDdr5DeserializerDram Interfaces (Ddr4EqualizerHbm3Hbm3EHbm4)High-Speed IoLayout Parasitics ModelingLpddr5Lpddr6NandOnfi TrainingParasitic ExtractionPhysical Design FlowsPower Delivery Network (Pdn)Power Integrity (Pi)SerdesSerializerSignal Integrity (Si)Zq Calibration