Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus)

BAE Systems, Inc. Senior Principal Design Verification Engineer - FPGA - (Sign-on Bonus) 7 Hours AgoSaved Hybrid San Diego, CA, USA 130K-222K Annually Senior level 130K-222K Annually Senior levelAerospace • Hardware • Information Technology • Security • Software • Cybersecurity • DefenseLead design verification for FPGA/ASIC signal-processing and control systems: plan and build SystemVerilog/UVM/OVM/VHDL self-checking, constrained-random testbenches; develop test plans; collect/analyze coverage; create reusable VIP; lead and mentor DV teams; drive process improvements and execute schedules.Top Skills: AsicBitbucketC++CadenceFpgaGitJavaJIRAMatlabMentor QuestaOvmPerlPythonSimulinkSystemverilogUvmVhdl