Sr. Member Technical Staff - ESD and Latch-Up - HBM

Our vision is to transform how the world uses information to enrich life for all .
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
We define ESD and latch-up architecture for next-generation HBM products across advanced nodes and 3D integration. Our team works across device, circuit, and packaging domains to solve reliability challenges that directly impact product quality. We take on complex problems and turn them into scalable solutions that enable high-performance memory!
As an SMTS/DMTS HBM ESD/Latch-Up Architect, you will define protection strategies across base die, DRAM stacks, and interconnects. This role shapes product reliability from early architecture through silicon validation. You will work across teams and influence technical direction while solving system-level ESD challenges.
Responsibilities:

• Define end-to-end ESD and latch-up architecture across base die, DRAM die, and interconnects

• Develop protection strategies for high-speed I/O, TSV interfaces, and advanced packaging

• Establish ESD/LUP standards, rule decks, and signoff criteria

• Drive correlation between design assumptions, silicon validation, and field reliability

• Partner with foundry and packaging teams on system-level ESD challenges

Minimum Qualifications:

• MS or PhD in Electrical Engineering or related field, or equivalent practical experience

• 10+ years of experience in ESD and latch-up design and reliability

• Expertise in advanced CMOS technologies such as FinFET or GAA

• Experience with 3D IC, TSV, or die-to-die interfaces

Preferred Qualifications:

• Experience defining architecture across multi-die or stacked memory systems

• Background in ESD device or circuit design

• Experience developing PDK collateral or ESD rule decks

• Experience debugging silicon failures related to ESD or latch-up

• Demonstrated technical leadership across cross-functional teams

The US base salary range that Micron Technology estimates it could pay for this full-time position is:
$177,000.00 - $334,000.00 a year
Additional compensation may include benefits, bonuses and equity.
Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits.
As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits .
Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.
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