Principal DDR Validation Engineer
Indexed description
Arm Principal DDR Validation Engineer YesterdaySaved Hybrid Austin, TX, USA 250K-338K Annually Expert/Leader 250K-338K Annually Expert/LeaderArtificial Intelligence • Internet of Things • SemiconductorLead validation of DDR and other high-speed subsystems for next-generation SoCs. Define validation methodology, produce specifications and test plans, develop C/C++ test content and scripts, execute and debug across emulation, FPGA and board environments, and collaborate with architecture, design, verification, performance, software, and board teams to optimize power, performance, and area.Top Skills: AsicBash/ShellCC++CpuCxlDdrxEmulationEthernetFpgaGpuHbmLpddrxPciePerlPythonSocTcl
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