Senior Design Engineer

Arm Senior Design Engineer Reposted 22 Hours AgoSaved Hybrid Austin, TX, USA 162K-219K Annually Senior level 162K-219K Annually Senior levelArtificial Intelligence • Internet of Things • SemiconductorDesign and integrate SoC subsystems (PCIe, DDR/LPDDR, HBM, UCIe, Ethernet); author micro-architecture specs; develop RTL in Verilog; perform static checks (CDC, RDC, X-Propagation, linting); collaborate with verification, performance analysis, and backend teams for floorplanning and timing closure; improve design methodologies and mentor team members while supporting project management.Top Skills: ArmCdcDdrDftEEthernetFloorplanningHbmLintingLpddrOvmPciePerlPythonRdcRtlSynthesisSystemverilogTiming AnalysisTiming ClosureUcieUvmVerilog HdlX-Propagation