Arm
Builtin · Indexed 2026-06-03
Principal Loadstore CPU Design Engineer
Continue to application
Add your email once, then Caio opens the original posting.
Indexed description
Arm Principal Loadstore CPU Design Engineer Reposted 12 Hours AgoSaved Hybrid Austin, TX, USA 250K-338K Annually Expert/Leader 250K-338K Annually Expert/LeaderArtificial Intelligence • Internet of Things • SemiconductorThe Principal Loadstore CPU Design Engineer will define microarchitecture for next-gen CPUs, driving innovations in high-performance CPU design and mentoring less-experienced engineers. Responsibilities include collaboration with design teams and communicating complex concepts clearly.Top Skills: CacheCoherency ProtocolsCpu MicroarchitectureHazard CheckingLoadstore Memory SystemSpeculative ExecutionTlb
Create a free Caio profile to unlock more results and save your role and location preferences.
Unlock free search
Want help applying to roles like this?
Search Caio for free. If the repetitive CV tweaking gets heavy, Daniel can help set up Caio Agent.
Ask about Agent
