Silicon ML Engineer III

Silicon ML Engineer III

Job Description

The Silicon ML Engineer (II/III) develops AI-driven capabilities for silicon design and verification workflows by infusing hardware domain knowledge into modern AI and large-model systems. This role differs from an Applied Scientist or MLE role by requiring close integration between machine learning methods and semiconductor design processes, data, and constraints. The engineer will build domain-aware ML/LLM and agent-based systems and translate research prototypes into production-grade tooling used in silicon design flows. Level will be determined based on experience, technical depth, and scope of ownership.

Key Responsibilities

• Design and implement AI-enabled silicon design and verification workflows with explicit incorporation of hardware domain knowledge and constraints
• Encode domain structure, rules, and expert feedback into ML/DL model pipelines, prompts, evaluation, and system logic
• Prepare and curate silicon design and verification datasets with domain-aware labeling and quality controls
• Docusign Envelope ID: D71FD0C3-D2E5-469B-BDF9-474E57D2338C
• Build AI for hardware research prototypes and translate them into scalable, production-quality systems integrated with design flows
• Collaborate directly with other chip design and verification engineers to ensure domain correctness and practical usability
• Contribute to system architecture and integration with internal silicon design tools and workflows in LLM-based agentic systems
• Produce technical documentation and communicate design decisions and tradeoffs to cross-functional stakeholders

• PhD in Computer Science, Electrical Engineering, or a relevant field with 3+ months of applied research or industry experience
• Strong programming skills in Python (PyTorch or similar ML frameworks preferred)
• Hands-on experience with machine learning / deep learning projects
• Experience working with messy, real-world data and defining quality metrics
• Demonstrated ability to work across abstraction layers - from research prototypes to production systems
• Demonstrated exposure to hardware design, verification, or EDA workflows through coursework, research, or industry work
• Proven track record of collaboration with with other deeply technical teams